CXMT Reports Progress on 4F Square DRAM Cell Structure Pursued by Samsung and SK Hynix
CXMT, a leading memory chip manufacturer from China, revealed significant advancements in a transistor design that competes with efforts by Samsung and SK Hynix. The firm asserts that its unique architecture could enhance storage density and boost efficiency. Central to this innovation is the "4F square" design, where each memory cell occupies an area equivalent to four square F, with F representing the smallest line width of a semiconductor. This allows for a greater number of cells to be integrated onto a single chip, facilitating increased density. Currently, mainstream commercial dynamic random-access memory (DRAM) utilizes a 6F square-cell structure. At a recent industry event in Shanghai, CXMT's president, Cao Kanyu, announced plans to introduce a new server-memory product utilizing this design by the end of 2026. This announcement aligns CXMT with Samsung and SK Hynix in the pursuit of denser cell architecture.
Key facts
- CXMT announced key progress on a chip structure also pursued by Samsung and SK Hynix
- The proprietary transistor design is intended to increase storage density and improve efficiency
- The development centers on the "4F square" design, where each memory cell occupies four square F
- F represents the minimum line width of a semiconductor
- Mainstream commercial DRAM uses a 6F square-cell structure
- CXMT president Cao Kanyu announced the plans at an industrial event in Shanghai over the weekend
- CXMT planned to roll out a new server-memory product based on the structure by the end of 2026
- The announcement was made according to a company statement
Entities
Artists
- Cao Kanyu
Institutions
- CXMT
- Samsung
- SK Hynix
Locations
- China
- Shanghai