Nanbeige4.2-3B on Apple Silicon: Fixing Deployment Bugs and Decreasing Looped Transformer Memory Overhead

A technical report available on arXiv (2608.13987) outlines the attempts to implement the Nanbeige4.2-3B model on Apple Silicon (MPS). This model features a 3B-parameter agentic architecture based on a Looped Transformer (LT), which reuses a single stack of layers for a second forward pass, enhancing depth without increasing parameters. The authors discovered five distinct bugs that hindered the released checkpoint's functionality via Hugging Face transformers, including a zeroed RoPE buffer and references to obsolete cache APIs. Although they resolved these issues, the LT's layer-reuse method resulted in doubled peak attention memory, proving inadequate for agentic tasks. To mitigate this, they proposed a chunked-prefill strategy that decreases memory overhead, allowing a 2.7x increase in context width on 32 GiB shared memory. Nonetheless, they assert that further patches are necessary for the model's usability. The report's authors, who are assessing the model on Apple Silicon, do not specify any institutional affiliation in the abstract. These findings are pertinent to developers working with large language models on Apple hardware and the wider AI deployment community.