Huawei Claims 1.4nm Chip Density by 2031 with Novel 3D Stacking

Huawei has unveiled a new 3D chip architecture called LogicFolding, which it claims can achieve transistor density equivalent to 1.4nm processes by 2031 without relying on advanced lithography tools. The design stacks multiple chips vertically to increase density, bypassing the need for extreme ultraviolet (EUV) lithography, to which Huawei has limited access due to US sanctions. The company presented the technology at the 2025 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA) in Hsinchu, Taiwan. Huawei's fellow engineer stated that the approach could help close the gap with global leaders like TSMC and Samsung. The announcement comes as the US continues to restrict China's access to advanced semiconductor manufacturing equipment.